Digital I/O

from sections 8.1 and 8.2 the User's Guide

The MSP430G2553 has two digital I/O ports, P1 (Port 1) and P2 (Port 2). Each port has eight I/O pins. Every I/O pin is individually configurable for input or output direction and each pin can also be individually read or written to.

Ports P1 and P2 have interrupt capability. Each interrupt for the P1 and P2 I/O pins can be individually enabled and configured to provide an interrupt on a rising edge or falling edge of an input signal. All P1 I/O pins use a single interrupt vector, and all P2 I/O pins use a different, single interrupt vector.

Specific pins are commonly written as P<port number>.<pin number>, for example P2.3 is pin 3 on the second port. The pins are numbered starting with 0.

Registers in this chapter are listed with a lowercase x, indicating a 1 or 2 should be used in that location.

The manual refers to all of these memory locations as "registers", but they should be thought of as separate from CPU registers such as the program counter or stack pointer.

Input Register PxIN

memory addresses 0x20 for P1, 0x28 for P2

Each bit in each PxIN register reflects the value of the input signal at the corresponding I/O pin when the pin is configured as I/O function.

if (P1IN & BIT3) { // check if P1.3 is 1

This bitwise AND operation will result in zero if P1.3 is not set, or a non-zero value (specifically the number 8) if P1.3 is set.

Output Registers PxOUT

memory addresses 0x21 for P1, 0x29 for P2

Each bit in each PxOUT register is the value to be output on the corresponding I/O pin when the pin is configured as I/O function, output direction, and the pull-up/down resistor is disabled.

P1OUT |= BIT2; // turn P1.2 on

This bitwise OR operation will set bit 2 in the memory location P1OUT, leaving the other pins at whatever value they are set to before the statement is executed.

If the pin's pullup/pulldown resistor is enabled, the corresponding bit in the PxOUT register selects pull-up or pull-down.

P1DIR = ~BIT3; // turn every port 1 pin to output except P1.3
P1REN =  BIT3; // enable resistor for P1.3
P1OUT =  BIT3; // choose pull-up resistor for P1.3

The second statement will enable a resistor for P1.3 and disable resistors for every other pin on port 1. The third statement chooses a pull-up resistor for P1.3 and turns off every other pin.

Direction Registers PxDIR

memory addresses 0x22 for P1, 0x2A for P2

Each bit in each PxDIR register selects the direction of the corresponding I/O pin, regardless of the selected function for the pin. PxDIR bits for I/O pins that are selected for other functions must be set as required by the other function.

P1DIR = 0b11000001; // P1.7, P1.6 and P1.0 set to outputs

This statement will set the pins listed in the comment to outputs and every other port 1 pin will be an input (so P1.5, P1.4, P1.3, P1.2 and P1.1).

Pullup/Pulldown Resistor Enable Registers PxREN

memory addresses 0x27 for P1, 0x2F for P2

Each bit in each PxREN register enables or disables the pullup/pulldown resistor of the corresponding I/O pin. The corresponding bit in the PxOUT register selects if the pin is pulled up or pulled down.

P1DIR = ~BIT3; // turn every port 1 pin to output except P1.3
P1REN = BIT3; // enable resistor for P1.3
P1OUT = BIT3; // choose pull-up resistor for P1.3

The second statement will enable a resistor for P1.3 and disable resistors for every other pin on port 1. The third statement chooses a pull-up resistor for P1.3 and turns off every other pin.

Function Select Registers PxSEL and PxSEL2

memory addresses 0x26 and 0x41 for P1, 0x2E and 0x42 for P2

Port pins are often multiplexed with other peripheral module functions. See the device-specific data sheet to determine pin functions. Each PxSEL and PxSEL2 bit is used to select the pin function - I/O port or peripheral module function.

Setting PxSELx = 1 does not automatically set the pin direction. Other peripheral module functions may require the PxDIRx bits to be configured according to the direction needed for the module function. See the pin schematics in the device-specific data sheet.

We will use the alternate output modes of some pins to generate signals from the MSP430's timer modules. See the chapter on timers for more information.

P1 and P2 Interrupts

Each pin in ports P1 and P2 have interrupt capability, configured with the PxIFG, PxIE, and PxIES registers. All P1 pins source a single interrupt vector, and all P2 pins source a different single interrupt vector. The PxIFG register can be tested to determine the source of a P1 or P2 interrupt.

For more information on configuring interrupts in software, see the chapter on interrupts.